1. Field of the Invention
The present invention relates to a shift register unit and, more particularly, to a shift register unit capable of generating two output pulses in turn.
2. Description of the Related Art
FIG. 1 shows a conventional shift register unit 10. A conventional signal driving circuit (not shown) includes a plurality of shift register units 10 generating pulses in turn for driving an LCD panel. FIG. 2 is a timing chart of the input pulse STB, CLK and CLK according to the conventional shift register unit 10 shown in FIG. 1. In the conventional shift register unit 10, however, the duty cycle TC of the clock pulses CLK and CLK must be completed within the duty cycle TS of the input pulse STB. Further, due to control of the clock pulses CLK and CLK, the clock inverters CINV4 and CINV5 switch repeatedly, and thus, consume excessive power. Furthermore, the conventional shift register unit requires greater chip area due to the number of the elements required therein.
Thus, there is a need to overcome these and other problems of the prior art and to provide a shift register unit with reduced power consumption and a shift register unit with a reduced number of elements to reduce the required chip area. Further, there is a need to provide a shift register unit capable of generating two output pulses in turn.